Davide Rusconi (University of Milan), Osama Yousef (University of Milan), Mirco Picca (University of Milan), Danilo Bruschi (University of Milan), Flavio Toffalini (Ruhr-Universitat Bochum),  Andrea Lanzi (University of Milan)

In this paper, we show E-FuzzEdge, a novel fuzzing architecture targeted towards improving the throughput of fuzzing campaigns in contexts where scalability is unavailable. E-FuzzEdge addresses the inefficiencies of hardware-in-the-loop fuzzing for microcontrollers by optimizing execution speed. We evaluated our system against both real-world embedded libraries and state-of-the-art benchmarks, demonstrating significant performance improvements. A key advantage of the E-FuzzEdge architecture is its compatibility with other embedded fuzzing techniques that perform on device testing instead of firmware emulation. This means that the broader embedded fuzzing community can integrate E-FuzzEdge into their workflows to enhance overall testing efficiency.

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Shreyash Tiwari (Computer and Information Science, University of Massachusetts Dartmouth), Nathaniel D. Bastian (Electrical Engineering and Computer Science, United States Military Academy), Gokhan Kul (Computer and Information Science, University of Massachusetts Dartmouth)

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cwPSU: Efficient Unbalanced Private Set Union via Constant-weight Codes

Qingwen Li (Xidian University), Song Bian (Beihang University), Hui Li (Xidian University)

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Guanlong Wu (SUSTech), Taojie Wang (SUSTech), Yao Zhang (ByteDance Inc.), Zheng Zhang (SUSTech), Jianyu Niu (SUSTech), Ye Wu (ByteDance Inc.), Yinqian Zhang (SUSTech)

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